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Schematic of silicon nanowire (5887830244)

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Summary

In this schematic image, a silicon nanowire is shown surrounded by a stack of thin layers of material called dielectrics, which store electrical charge. NIST scientists determined the best arrangement for this dielectric stack for the optimal construction of silicon nanowire-based memory devices.

See also www.nist.gov/pml/semiconductor/nanowire-052411.cfm.

Credit: Zhu, GMU

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national institute of standards and technology diagram electrical diagrams technical drawing technical diagrams
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Date

17/05/2011
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Schematic of silicon nanowire
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http://commons.wikimedia.org/
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label_outline Explore Electrical Diagrams, National Institute Of Standards And Technology, Technical Diagrams

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national institute of standards and technology diagram electrical diagrams technical drawing technical diagrams